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Precomputation-based sequential logic optimization for low power.
Mazhar Alidina
José Monteiro
Srinivas Devadas
Abhijit Ghosh
Marios C. Papaefthymiou
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (1994)
Keyphrases
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low power
logic circuits
power consumption
low cost
high speed
delay insensitive
single chip
high power
low power consumption
cmos technology
wireless transmission
digital signal processing
image sensor
vlsi architecture
vlsi circuits
real time
mixed signal
message passing