Constrained clock shifting for field programmable gate arrays.
Deshanand P. SinghStephen Dean BrownPublished in: FPGA (2002)
Keyphrases
- field programmable gate array
- fpga device
- hardware implementation
- embedded systems
- programmable logic
- parallel computing
- hardware design
- fpga technology
- high speed
- digital signal processing
- hardware architecture
- host computer
- clock frequency
- digital signal processors
- hardware software co design
- computing systems
- power consumption
- image processing algorithms
- parallel architectures
- software implementation
- massively parallel
- hardware software
- hardware and software
- reconfigurable hardware
- open source
- artificial intelligence
- integrated circuit
- signal processing
- software engineering
- neural network