A Hardware Implementation of a Unit for Geometric Algebra Operations With Parallel Memory Arrays (Abstract Only).
Gerardo Soria GarcíaAdrian Pedroza de-la-CrúzSusana Ortega-CisnerosJuan José Raygoza-PanduroEduardo Bayro-CorrochanoPublished in: FPGA (2015)
Keyphrases
- hardware implementation
- processing elements
- functional units
- geometric algebra
- hardware architecture
- parallel architecture
- memory management
- efficient implementation
- signal processing
- image processing algorithms
- dedicated hardware
- processing units
- software implementation
- fpga implementation
- hardware design
- field programmable gate array
- pipeline architecture
- conformal geometric algebra
- parallel computers
- fpga device
- viewpoint
- parallel processing
- general purpose
- neural network