A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors.
Yen-Cheng ChiuZhixiao ZhangJia-Jing ChenXin SiRuhui LiuYung-Ning TuJian-Wei SuWei-Hsing HuangJing-Hong WangWei-Chen WeiJe-Min HungShyh-Shyuan SheuSih-Han LiChih-I WuRen-Shuo LiuChih-Cheng HsiehKea-Tiong TangMeng-Fan ChangPublished in: IEEE J. Solid State Circuits (2020)
Keyphrases
- random access memory
- memory access
- design considerations
- artificial intelligence
- cellular neural networks
- knowledge base
- parallel algorithm
- processing units
- low voltage
- expert systems
- power consumption
- knowledge representation
- memory subsystem
- parallel computation
- embedded dram
- machine learning
- memory hierarchy
- inter processor communication
- edge information
- weighted graph
- parallel processing
- edge detector
- case based reasoning
- random access
- computing power
- high performance computing
- parallel computing
- multithreading
- memory requirements
- main memory
- edge detection