A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power Overhead.
Zheng GuoJami WiedemerYusung KimPrithvee Sundararajan RamamoorthyPrateeksha Bindiganavile SathyaprasadSmita ShridharanDaeyeon KimEric KarlPublished in: VLSI Circuits (2020)