A power-efficient 4-PAM signaling scheme with convolutional encoder in space for chip-to-chip communication.

Kamran Farzan David A. Johns

Published in: ESSCIRC (2004)

Keyphrases

vlsi implementation
ibm power processor
high speed
multithreading
low cost
chip design
analog vlsi

physical design
highly efficient
high density
functional verification
single chip
power management
power dissipation

search space
memory subsystem
programmable logic
circuit design
high bandwidth
computational complexity

physical space
error resilience
communication networks
power consumption
space requirements
computational power