Formal Verification of a DSP Chip Using an Iterative Approach.
Ali HabibiSofiène TaharAdel GhazelPublished in: DSD (2002)
Keyphrases
- formal verification
- functional verification
- high speed
- model checking
- model checker
- automated verification
- signal processing
- bounded model checking
- digital signal processors
- low cost
- symbolic model checking
- digital signal processor
- digital signal processing
- program slicing
- low power
- vlsi implementation
- high density
- texas instruments
- object oriented
- real time
- verilog hdl
- low power consumption
- graph theory
- image processing
- artificial intelligence