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voltage scalable digital frequency generator for SoC clocking.
Martin Cochet
Sylvain Clerc
Guenole Lallement
Fady Abouzeid
Philippe Roche
Jean-Luc Autran
Published in:
A-SSCC (2017)
Keyphrases
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circuit design
power system
high voltage
phase locked loop
hardware and software
duty cycle
neural network
information systems
lightweight
embedded systems
web scale
transmission line