A globally asynchronous locally synchronous DMR architecture for aggressive low-power fault toleration.
Yuttakon YuttakonkitJun YaoYasuhiko NakashimaPublished in: COOL Chips (2014)
Keyphrases
- low power
- vlsi architecture
- power consumption
- low cost
- high speed
- cmos technology
- asynchronous communication
- mixed signal
- delay insensitive
- single chip
- nm technology
- low power consumption
- vlsi circuits
- high power
- logic circuits
- digital signal processing
- real time
- wireless transmission
- fault diagnosis
- image sensor
- energy dissipation
- signal processor
- gate array
- power reduction
- vlsi implementation
- image processing