40 Gb/s FPGA implementation of a reduced complexity volterra DFE for DQPSK optical links.
Maki NanouAndreas EmeretlisChristina Tanya PolitiGeorge TheodoridisKristina GeorgoulakisGeorge-Othon GlentisPublished in: ICTON (2015)
Keyphrases
- reduced complexity
- fpga implementation
- hardware implementation
- vector quantization
- field programmable gate array
- image enhancement
- least squares
- image processing algorithms
- low cost
- image coder
- machine learning
- general purpose
- real time
- computing systems
- parallel computing
- motion estimation algorithm
- pattern recognition