An Off-Chip Attack on Hardware Enclaves via the Memory Bus.
Dayeol LeeDongha JungIan T. FangChia-che TsaiRaluca Ada PopaPublished in: CoRR (2019)
Keyphrases
- processor core
- high speed
- memory subsystem
- low cost
- memory access
- vlsi implementation
- multithreading
- computing power
- digital signal processors
- memory bandwidth
- ibm zenterprise
- speculative execution
- single chip
- host computer
- programmable logic
- circuit design
- internal memory
- evolvable hardware
- computational power
- chip design
- random access memory
- operating system
- input output
- memory management
- direct memory access
- gigabit ethernet
- ibm power processor
- level parallelism
- hardware and software
- field programmable gate array
- main memory
- physical design
- real time
- parallel hardware
- data corruption
- secret key
- data acquisition
- instruction set
- virtual memory
- digital circuits
- associative memory
- signal processor
- memory hierarchy
- hardware architecture
- power dissipation
- processing elements
- low latency
- low power
- hardware implementation
- computing systems
- massively parallel
- high density
- wireless sensor networks
- computer systems
- floating point arithmetic
- embedded systems
- shared memory
- data transfer
- processing units
- image sensor
- flash memory
- parallel programming
- external memory
- reconfigurable hardware