i-DPs CGRA: An Interleaved-Datapaths Reconfigurable Accelerator for Embedded Bio-Signal Processing.
Loris DuchSoumya BasuMiguel Peón QuirósGiovanni AnsaloniLaura PozziDavid AtienzaPublished in: IEEE Embed. Syst. Lett. (2019)
Keyphrases
- signal processing
- hardware implementation
- field programmable gate array
- embedded systems
- smart camera
- watermarking algorithm
- low cost
- fourier transform
- image processing
- compute intensive
- pattern recognition
- parallel implementation
- digital signal processing
- databases
- reconfigurable architecture
- hw sw
- signal analysis
- case study
- fine grain
- face recognition
- real world
- neural network