A 16-Gb/s -11.6-dBm OMA Sensitivity 0.7-pJ/bit Optical Receiver in 65-nm CMOS Enabled by Duobinary Sampling.
Mostafa Gamal AhmedDongwook KimRomesh Kumar NandwanaAhmed ElkholyKadaba R. LakshmikumarPavan Kumar HanumoluPublished in: IEEE J. Solid State Circuits (2021)
Keyphrases
- high speed
- nm technology
- random access memory
- cmos technology
- metal oxide
- image sensor
- solid state
- low power
- silicon on insulator
- focal plane
- power consumption
- sensitivity analysis
- analog to digital converter
- metal oxide semiconductor
- random sampling
- high sensitivity
- low cost
- cmos image sensor
- sampling strategy
- power supply
- digital rights management
- sampling methods
- sampling algorithm
- power dissipation
- single chip
- delay insensitive
- monte carlo
- vlsi circuits
- design considerations
- sample size
- x ray