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A unified flagged prefix constant addition-subtraction scheme for design of area and power efficient binary floating-point and constant integer arithmetic circuits.

Soumya GangulyAbhishek MittalSyed Ershad AhmedM. B. Srinivas
Published in: APCCAS (2014)
Keyphrases
  • floating point
  • sparse matrices
  • integer arithmetic
  • signal processing
  • matching algorithm
  • fixed point
  • power dissipation
  • interval arithmetic
  • chip design
  • pairwise
  • graph cuts
  • power consumption
  • instruction set