Login / Signup
Voltage Noise Induced DRAM Soft Error Reduction Technique for 3D-CPUs.
Tiantao Lu
Caleb Serafy
Zhiyuan Yang
Ankur Srivastava
Published in:
ISLPED (2016)
Keyphrases
</>
error reduction
low voltage
classification error
classification accuracy
semi supervised
missing data
iterative learning
feature selection
noise reduction
significant improvement
main memory
parallel processing
noise level
data sets