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Minimizing area and power of sequential CMOS circuits using threshold decomposition.
Niranjan Kulkarni
Nishant Nukala
Sarma B. K. Vrudhula
Published in:
ICCAD (2012)
Keyphrases
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power consumption
power dissipation
chip design
delay insensitive
analog vlsi
high speed
low power
cmos technology
power reduction
circuit design
vlsi circuits
logic circuits
random access memory
power saving
power management
low cost
decomposition method
logic synthesis
asynchronous circuits
total energy
low voltage
design methodology
decomposition methods
power supply
parallel processing
decomposition algorithm