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Design and Evaluation of Implementation Impact on a Fault-Tolerant Network-on-Chip Router.
Douglas Rossi Melo
César Albenes Zeferino
Eduardo Augusto Bezerra
Luigi Dilillo
Published in:
DTIS (2021)
Keyphrases
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fault tolerant
fault tolerance
network on chip
interconnection networks
distributed systems
design process
design methodology
packet switched
computer networks
low power
data transfer