Optimizing Memory Power in Hybrid ARM-FPGA Chips With Lossless Data Compression.
Peng SunJosé L. Núñez-YáñezPublished in: FPGAworld (2014)
Keyphrases
- lossless data compression
- high speed
- digital signal processors
- data compression
- field programmable gate array
- power consumption
- computational power
- lossless compression
- power reduction
- processing elements
- memory requirements
- low cost
- hardware implementation
- compression algorithm
- real time
- hardware architecture
- power dissipation
- parallel hardware
- computer systems
- parallel architecture
- high density
- multithreading
- power distribution
- integrated circuit
- chip design
- computational complexity