Highly Versatile DSP Blocks for Improved FPGA Arithmetic Performance.

Hadi Parandeh-Afshar Paolo Ienne

Published in: FCCM (2010)

Keyphrases

signal processing
digital signal processing
real time image processing
high speed
verilog hdl
systolic array
hardware implementation
image processing
pattern recognition
real time
search engine
computer vision
digital signal
data sets
improved algorithm
field programmable gate array