Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications.
Flavio CarbognaniFelix BürginNorbert FelberHubert KaeslinWolfgang FichtnerPublished in: PATMOS (2005)
Keyphrases
- low power
- power consumption
- single chip
- high speed
- low cost
- low power consumption
- power dissipation
- logic circuits
- vlsi architecture
- digital signal processing
- power reduction
- gate array
- mixed signal
- cmos technology
- wireless transmission
- real time
- circuit design
- high power
- lightweight
- ultra low power
- design process
- image sensor
- vlsi circuits
- nm technology
- design methodology