Login / Signup
Reconfiguring the boundaries of a mesh-connected array of processors with run-time programmable logic.
Rita Cucchiara
Tullio Salmon Cinotti
Giovanni Neri
G. Rustichelli
Published in:
Microprocess. Microsystems (1993)
Keyphrases
</>
programmable logic
mesh connected
array processor
massively parallel
binary images
processor array
image processing tasks
field programmable gate array
semantic network
scan line
high performance computing
image processing
parallel computing
feature detection
low cost
image registration
dynamic programming