An ADC BIST using on-chip ramp generation and digital ORA.

Senthil Sivakumar S. P. Joy Vasantha Rani

Published in: Microelectron. J. (2018)

Keyphrases

sigma delta
analog to digital converter
circuit design
single chip
low cost
cmos image sensor
built in self test
high speed
phase locked loop
mixed signal
vlsi implementation
programmable logic
analog vlsi
data sets
neural network