Clock reduction in timed automata while preserving design parameters.

Beyazit Yalcinkaya Ebru Aydin Gol

Published in: FormaliSE@ICSE (2019)

Keyphrases

design parameters
timed automata
model checking
design space
reachability analysis
theorem prover
theorem proving
machine learning
power consumption
first order logic
neural network
real world
search algorithm
online learning
fault diagnosis