A Partitioned CAM Architecture with FPGA Acceleration for Binary Descriptor Matching.
Parastoo SoleimaniDavid W. CapsonKin Fun LiPublished in: ACM Trans. Reconfigurable Technol. Syst. (2024)
Keyphrases
- keypoints
- hardware implementation
- hardware architecture
- real time
- software implementation
- parallel architecture
- feature descriptors
- fpga implementation
- hardware design
- fpga technology
- matching algorithm
- scale and rotation invariant
- management system
- dedicated hardware
- low cost
- high speed
- geometric consistency
- reconfigurable hardware
- field programmable gate array
- pipelined architecture
- software architecture
- xilinx virtex
- hardware architectures
- object recognition
- non binary
- data flow
- shape context
- image matching
- feature points
- hardware software
- region descriptors
- systolic array
- scale invariant feature transform
- real time image processing
- master slave
- graph matching
- shape descriptors
- action recognition
- signal processing
- d objects
- multiscale
- computer vision