Test chips for die stress characterization using arrays of CMOS sensors.

Arthur T. Bradley Richard C. Jaeger Jeffrey C. Suhling Y. Zou

Published in: CICC (1999)

Keyphrases

focal plane
high speed
infrared
real time
analog vlsi
sensor networks
low power
image sensor
test cases
neural network
low cost
data acquisition
power consumption
data fusion
sensor fusion
multi sensor
data sets