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Improving the power-delay product in SCL circuits using source follower output stage.
Armin Tajalli
Frank K. Gürkaynak
Yusuf Leblebici
Massimo Alioto
Elizabeth J. Brauer
Published in:
ISCAS (2008)
Keyphrases
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power dissipation
power consumption
multiple stages
low power
chip design
power reduction
analog circuits
high speed
life cycle
website
destination node
input data
data sets
digital signal processing
product information
product quality
steady state
low cost