Lower Bounds for Synchronous Circuits and Planar Circuits.

Published in: Inf. Process. Lett. (1989)

Keyphrases

lower bound
high speed
high level synthesis
upper bound
analog vlsi
delay insensitive
tunnel diode
circuit design
logic synthesis
digital circuits
analog circuits
data sets
asynchronous circuits
vlsi circuits
asynchronous communication
logic circuits
branch and bound algorithm
optimal solution