Sign in

A partitioning algorithm for technoiogy-mapped designs on single-chip emulation systems.

Abdel EjniouiN. Ranganathan
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2001)
Keyphrases
  • partitioning algorithm
  • single chip
  • computer systems
  • low power
  • image enhancement
  • pairwise
  • power consumption