Low-power domino circuits using NMOS pull-up on off-critical paths.
Abdulkadir Utku DirilYuvraj Singh DhillonAbhijit ChatterjeeAdit D. SinghPublished in: ASP-DAC (2005)
Keyphrases
- low power
- high speed
- logic circuits
- cmos technology
- power consumption
- vlsi circuits
- power reduction
- low cost
- delay insensitive
- power dissipation
- mixed signal
- high power
- single chip
- low power consumption
- digital signal processing
- image sensor
- wireless transmission
- real time
- ultra low power
- parallel processing
- multi channel
- vlsi architecture
- energy dissipation
- gate array
- digital circuits