Dual-Hiding Side-Channel-Attack Resistant FPGA-Based Asynchronous-Logic AES: Design, Countermeasures and Evaluation.
Kwen-Siong ChongJun-Sheng NgJuncheng ChenNe Kyaw Zwa LwinNay Aung KyawWeng-Geng HoJoseph Sylvester ChangBah-Hwee GweePublished in: IEEE J. Emerg. Sel. Topics Circuits Syst. (2021)