Static Power SCA of Sub-100 nm CMOS ASICs and the Insecurity of Masking Schemes in Low-Noise Environments.
Thorben MoosPublished in: IACR Trans. Cryptogr. Hardw. Embed. Syst. (2019)
Keyphrases
- power consumption
- silicon on insulator
- low signal to noise ratio
- nm technology
- high noise
- cmos technology
- low power
- noisy data
- low cost
- chip design
- real world
- noise level
- random noise
- physical design
- power dissipation
- metal oxide semiconductor
- ibm power processor
- high speed
- allocation scheme
- missing data
- signal noise ratio
- dynamic environments
- analog vlsi
- embedded systems
- power management
- human visual system
- median filter
- edge detection
- noise reduction