A programmable ternary CPU using hybrid CMOS/memristor circuits.

Daniel Wust Dietmar Fey Johannes Knödtel

Published in: Int. J. Parallel Emergent Distributed Syst. (2018)

Keyphrases

floating gate
quantum mechanics
analog vlsi
delay insensitive
circuit design
high speed
low cost
vlsi circuits
single chip
chip design
cmos technology
low voltage
low power
focal plane
random access memory
mixed signal
digital circuits
power consumption
decision making
power dissipation
decision theory
multi objective