Chip Power-Frequency Scaling in 10/7nm Node.
Phil OldigesReinaldo A. VegaHenry K. UtomoNick A. LanzilloThomas WassickJuntao LiJunli WangGhavam G. ShahidiPublished in: IEEE Access (2020)
Keyphrases
- silicon on insulator
- power consumption
- ibm power processor
- nm technology
- cmos technology
- power dissipation
- clock gating
- clock frequency
- low power
- low cost
- high speed
- power reduction
- chip design
- single chip
- metal oxide semiconductor
- dynamic random access memory
- programmable logic
- floating point unit
- tree structure
- physical design
- integrated circuit
- low frequency
- phase locked loop