A Memory-Efficient and Highly Parallel Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC.
Chao-Yang KaoYoun-Long LinPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2010)
Keyphrases
- variable block size
- memory efficient
- motion estimation
- highly parallel
- variable block size motion estimation
- motion estimator
- multiple reference frames
- inter frame
- coding efficiency
- video coding
- quadtree
- block size
- efficient implementation
- motion compensation
- motion vectors
- intra prediction
- image sequences
- motion compensated
- macroblock
- block matching
- parallel architectures
- motion field
- computing systems
- motion model
- computer vision
- optical flow
- single chip
- video compression
- rate distortion
- video sequences
- computational complexity
- super resolution
- reference frame
- motion estimation algorithm
- video coding standard
- motion estimates
- spatial domain
- bit rate
- parallel programming
- low power