Estimation of reject ratio in testing of combinatorial circuits.

Dinesh D. Gaitonde Jitendra Khare D. M. H. Walker Wojciech P. Maly

Published in: VTS (1993)

Keyphrases

estimation algorithm
standard deviation
neural network
accurate estimation
robust estimation
case study
multiscale
probabilistic model
low cost
high speed
maximum likelihood
test set
software testing
estimation process
circuit design
delay insensitive