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Optimizing test architecture of 3D stacked ICs for partial stack/complete stack using hard SoCs.

Surajit Kumar RoyChandan GiriHafizur Rahaman
Published in: IDT (2013)
Keyphrases
  • artificial intelligence
  • design considerations
  • layered architecture
  • real time
  • e learning
  • clustering algorithm
  • artificial neural networks
  • control system
  • management system
  • test cases
  • network architecture