FPGA-based implementation alternatives for the inner loop of the Secure Hash Algorithm SHA-256.
Ignacio Algredo-BadilloClaudia Feregrino UribeRené CumplidoMiguel Morales-SandovalPublished in: Microprocess. Microsystems (2013)
Keyphrases
- hardware implementation
- learning algorithm
- preprocessing
- times faster
- experimental evaluation
- search space
- parallel implementation
- dynamic programming
- detection algorithm
- optimal solution
- hardware architecture
- tree structure
- optimization algorithm
- computational complexity
- input data
- cost function
- image processing algorithms
- convergence rate
- computational cost
- worst case
- high accuracy
- segmentation algorithm
- clustering method
- theoretical analysis
- recognition algorithm
- improved algorithm
- significant improvement
- hash functions
- k means
- expectation maximization
- particle swarm optimization