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Efficient Implementation of 2-D Convolution on DRRA and DiMArch Architectures.
Pudi Dhilleswararao
Rajeev Ryansh
Srinivas Boppu
Yu Yang
Ahmed Hemani
Published in:
HEART (2023)
Keyphrases
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efficient implementation
parallel architectures
hardware implementation
image processing
active set
efficient processing
convolution kernel
map reduce
highly parallel
graphics processing units