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Validation of Asynchronous Circuit Specifications Using IF/CADP.

Dominique BorrioneMenouer BoubekeurLaurent MounierMarc RenaudinAntoine Siriani
Published in: VLSI-SoC (Selected Papers) (2003)
Keyphrases
  • delay insensitive
  • asynchronous circuits
  • low power
  • neural network
  • genetic algorithm
  • steady state