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Validation of Asynchronous Circuit Specifications Using IF/CADP.
Dominique Borrione
Menouer Boubekeur
Laurent Mounier
Marc Renaudin
Antoine Siriani
Published in:
VLSI-SoC (Selected Papers) (2003)
Keyphrases
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delay insensitive
asynchronous circuits
low power
neural network
genetic algorithm
steady state