Design of Multi-GHz Asynchronous Pipelined Circuits in MOS Current-Mode Logic.
Tin Wai KwanMaitham ShamsPublished in: VLSI Design (2005)
Keyphrases
- high level synthesis
- delay insensitive
- logic synthesis
- chip design
- asynchronous circuits
- logic circuits
- case study
- digital circuits
- circuit design
- high speed
- user interface
- classical logic
- shift register
- neural network
- parallel architecture
- design methodology
- data flow
- design process
- quantum computing
- multi agent systems
- floating gate
- flip flops
- built in self test