FPGA-based architecture for real time segmentation and denoising of HD video.

Mariangela Genovese Ettore Napoli

Published in: J. Real Time Image Process. (2013)

Keyphrases

real time
hd video
denoising
high definition
video communication
image denoising
image segmentation
level set
hardware architecture
multiscale
smart camera
video transmission
image processing
hardware design
hardware implementation
edge detection
gaussian noise
noisy images
high speed
video coding