A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology.

Lan-Chou Cho Chihun Lee Chao-Ching Hung Shen-Iuan Liu

Published in: IEEE J. Solid State Circuits (2009)

Keyphrases

cmos technology
low power
high speed
spl times
power consumption
low voltage
parallel processing
power dissipation
image sensor
low cost
silicon on insulator
multimedia
mixed signal
image processing