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Full-Chip Routing Considering Double-Via Insertion.
Huang-Yu Chen
Mei-Fang Chiang
Yao-Wen Chang
Lumdo Chen
Brian Han
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2008)
Keyphrases
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high speed
routing algorithm
low cost
routing protocol
high density
analog vlsi
vlsi implementation
ad hoc networks
wireless ad hoc networks
vlsi design
routing problem
mobile ad hoc networks
single chip
physical design
evolvable hardware
shortest path
circuit design
real time
power dissipation
network traffic
modular design
qos routing
chip design
host computer
ibm power processor