Low power 10-transistor full adder design based on degenerate pass transistor logic.
Jin-Fa LinYin-Tsung HwangMing-Hwa SheuPublished in: ISCAS (2012)
Keyphrases
- low power
- logic circuits
- power dissipation
- high speed
- power consumption
- low cost
- single chip
- gate array
- low power consumption
- vlsi architecture
- digital signal processing
- cmos technology
- vlsi circuits
- high power
- power reduction
- mixed signal
- delay insensitive
- wireless transmission
- nm technology
- image sensor
- design process
- digital circuits
- embedded systems
- hardware and software
- finite state machines
- integrated circuit