Hybrid stacked memory architecture for energy efficient embedded chip-multiprocessors based on compiler directed approach.
Salman OnsoriArghavan AsadÖzcan ÖzturkMahmood FathyPublished in: IGSC (2015)
Keyphrases
- energy efficient
- level parallelism
- multithreading
- wireless sensor networks
- dynamic random access memory
- sensor networks
- energy consumption
- multi core architecture
- memory access
- memory subsystem
- parallel computing
- computational power
- memory bandwidth
- multi core processors
- data dissemination
- management system
- distributed memory
- base station
- parallel processing
- energy efficiency
- instruction set
- routing protocol
- memory management
- shared memory
- data transmission
- high speed
- low cost
- parallel architecture
- real time
- multi channel
- associative memory
- sensor nodes
- random access memory
- mobile phone
- response time
- mobile devices