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A 40nm 33.6Tops/W 8T-SRAM Computing-in-Memory Macro with DAC-less Spike-Pulse-Truncation Input and ADC-less Charge-Reservoir-Integrate-Counter Output.

He ZhangJunzhan LiuKang WangYunqian FanShufeng FuJinyu BaiBiao PanYongpan LiuWeisheng Zhao
Published in: ICTA (2021)
Keyphrases
  • desired output
  • input data
  • multiple output
  • dynamic random access memory
  • input variables
  • hidden units
  • memory space
  • random access memory
  • data structure
  • output space
  • metal oxide
  • power consumption
  • control signals