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Achieving Versatile and Simultaneous Cache Optimizations With Nonvolatile SRAM.

Rui WangDan JiaTao LiDepei Qian
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2017)
Keyphrases
  • power consumption
  • power reduction
  • data transmission
  • prefetching
  • dynamic random access memory
  • data access
  • caching scheme
  • query processing
  • back end
  • hit rate
  • low power
  • cache management
  • embedded processors