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Static cache partitioning robustness analysis for embedded on-chip multi-processors.
Anca Mariana Molnos
Sorin Dan Cotofana
Marc J. M. Heijligers
Jos T. J. van Eijndhoven
Published in:
Conf. Computing Frontiers (2006)
Keyphrases
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embedded processors
high speed
parallel algorithm
dynamic analysis
single chip
memory subsystem
data analysis
statistical analysis
high density
parallel computing