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Gate Mapping Automation for Asynchronous NULL Convention Logic Circuits.
Farhad Alibeygi Parsan
Waleed K. Al-Assadi
Scott C. Smith
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2014)
Keyphrases
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logic circuits
low power
tunnel diode
logic synthesis
functional decomposition
gate array
computer vision
pattern recognition
real time