Decomposition of instruction decoders for low-power designs.
Wu-An KuoTingTing HwangAllen C.-H. WuPublished in: ACM Trans. Design Autom. Electr. Syst. (2006)
Keyphrases
- low power
- power reduction
- power consumption
- low cost
- high speed
- nm technology
- high power
- single chip
- wireless transmission
- vlsi architecture
- low power consumption
- gate array
- digital signal processing
- logic circuits
- ultra low power
- delay insensitive
- image sensor
- digital camera
- general purpose
- mixed signal
- power saving
- real time